diff -ruN liboil-0.2.0.orig/liboil/simdpack/abs_u16_s16.c liboil-0.2.0/liboil/simdpack/abs_u16_s16.c --- liboil-0.2.0.orig/liboil/simdpack/abs_u16_s16.c 2004-09-08 06:18:51.000000000 +0200 +++ liboil-0.2.0/liboil/simdpack/abs_u16_s16.c 2004-11-17 01:09:54.395284136 +0100 @@ -349,7 +349,7 @@ #ifdef HAVE_CPU_POWERPC static void -abs_u16_s16_a16_altivec (uint16_t * dest, int dstr, int16_t * src, int sstr, +abs_u16_s16_altivec (uint16_t * dest, int dstr, int16_t * src, int sstr, int n) { int i; diff -ruN liboil-0.2.0.orig/liboil/simdpack/clip_ref.c liboil-0.2.0/liboil/simdpack/clip_ref.c --- liboil-0.2.0.orig/liboil/simdpack/clip_ref.c 2004-09-08 06:18:51.000000000 +0200 +++ liboil-0.2.0/liboil/simdpack/clip_ref.c 2004-11-17 11:19:29.352045552 +0100 @@ -22,6 +22,9 @@ #include +typedef float f32; +typedef double f64; + #define CLIP_DEFINE_REF(type) \ static void clip_ ## type ## _ref ( \ type_ ## type *dest, \ diff -ruN liboil-0.2.0.orig/liboil/simdpack/sad8x8.c liboil-0.2.0/liboil/simdpack/sad8x8.c --- liboil-0.2.0.orig/liboil/simdpack/sad8x8.c 2004-09-08 06:18:51.000000000 +0200 +++ liboil-0.2.0/liboil/simdpack/sad8x8.c 2004-11-17 11:12:43.265780048 +0100 @@ -70,158 +70,6 @@ OIL_DEFINE_IMPL_REF(sad8x8_s16_ref, sad8x8_s16); -#ifdef HAVE_CPU_POWERPC -static void -sad8x8_s16_a16_altivec (uint32_t *dest, int16_t *src1, int16_t *src2, int s1str, int s2str) -{ - static uint32_t x[4] __attribute__ ((__aligned__ (16))); - - sl_altivec_load8_0(src1, s1str); - sl_altivec_load8_8(src2, s2str); - - __asm__ __volatile__( - "\n" - "\tvspltisw 19, 0\n" - "\tvspltisw 22, 0\n" - - "\tvminsh 16, 0, 8\n" - "\tvmaxsh 17, 0, 8\n" - "\tvsubuhm 18, 17, 16\n" - "\tvmrghh 20, 19, 18\n" - "\tvmrglh 21, 19, 18\n" - "\tvsumsws 22, 20, 22\n" - "\tvsumsws 22, 21, 22\n" - - "\tvminsh 16, 1, 9\n" - "\tvmaxsh 17, 1, 9\n" - "\tvsubuhm 18, 17, 16\n" - "\tvmrghh 20, 19, 18\n" - "\tvmrglh 21, 19, 18\n" - "\tvsumsws 22, 20, 22\n" - "\tvsumsws 22, 21, 22\n" - - "\tvminsh 16, 2, 10\n" - "\tvmaxsh 17, 2, 10\n" - "\tvsubuhm 18, 17, 16\n" - "\tvmrghh 20, 19, 18\n" - "\tvmrglh 21, 19, 18\n" - "\tvsumsws 22, 20, 22\n" - "\tvsumsws 22, 21, 22\n" - - "\tvminsh 16, 3, 11\n" - "\tvmaxsh 17, 3, 11\n" - "\tvsubuhm 18, 17, 16\n" - "\tvmrghh 20, 19, 18\n" - "\tvmrglh 21, 19, 18\n" - "\tvsumsws 22, 20, 22\n" - "\tvsumsws 22, 21, 22\n" - - "\tvminsh 16, 4, 12\n" - "\tvmaxsh 17, 4, 12\n" - "\tvsubuhm 18, 17, 16\n" - "\tvmrghh 20, 19, 18\n" - "\tvmrglh 21, 19, 18\n" - "\tvsumsws 22, 20, 22\n" - "\tvsumsws 22, 21, 22\n" - - "\tvminsh 16, 5, 13\n" - "\tvmaxsh 17, 5, 13\n" - "\tvsubuhm 18, 17, 16\n" - "\tvmrghh 20, 19, 18\n" - "\tvmrglh 21, 19, 18\n" - "\tvsumsws 22, 20, 22\n" - "\tvsumsws 22, 21, 22\n" - - "\tvminsh 16, 6, 14\n" - "\tvmaxsh 17, 6, 14\n" - "\tvsubuhm 18, 17, 16\n" - "\tvmrghh 20, 19, 18\n" - "\tvmrglh 21, 19, 18\n" - "\tvsumsws 22, 20, 22\n" - "\tvsumsws 22, 21, 22\n" - - "\tvminsh 16, 7, 15\n" - "\tvmaxsh 17, 7, 15\n" - "\tvsubuhm 18, 17, 16\n" - "\tvmrghh 20, 19, 18\n" - "\tvmrglh 21, 19, 18\n" - "\tvsumsws 22, 20, 22\n" - "\tvsumsws 22, 21, 22\n" - - "\tli 0, 0\n" - "\tstvx 22, %0, 0\n" - : - : "r" (x) - ); - *dest = x[3]; -} - -/* IMPL sad8x8_s16_l15_a16_altivec defined(SIMDPACK_USE_ALTIVEC) */ -SL_sad8x8_s16_storage -void sad8x8_s16_l15_a16_altivec(uint32_t *dest, int16_t *src1, int16_t *src2, int s1str, int s2str) -{ - static uint32_t x[4] __attribute__ ((__aligned__ (16))); - - sl_altivec_load8_0(src1, s1str); - sl_altivec_load8_8(src2, s2str); - - __asm__ __volatile__( - "\n" - "\tvspltisw 19, 0\n" - "\tvspltisw 22, 0\n" - - "\tvminsh 16, 0, 8\n" - "\tvmaxsh 17, 0, 8\n" - "\tvsubuhm 18, 17, 16\n" - "\tvsum4shs 22, 18, 22\n" - - "\tvminsh 16, 1, 9\n" - "\tvmaxsh 17, 1, 9\n" - "\tvsubuhm 18, 17, 16\n" - "\tvsum4shs 22, 18, 22\n" - - "\tvminsh 16, 2, 10\n" - "\tvmaxsh 17, 2, 10\n" - "\tvsubuhm 18, 17, 16\n" - "\tvsum4shs 22, 18, 22\n" - - "\tvminsh 16, 3, 11\n" - "\tvmaxsh 17, 3, 11\n" - "\tvsubuhm 18, 17, 16\n" - "\tvsum4shs 22, 18, 22\n" - - "\tvminsh 16, 4, 12\n" - "\tvmaxsh 17, 4, 12\n" - "\tvsubuhm 18, 17, 16\n" - "\tvsum4shs 22, 18, 22\n" - - "\tvminsh 16, 5, 13\n" - "\tvmaxsh 17, 5, 13\n" - "\tvsubuhm 18, 17, 16\n" - "\tvsum4shs 22, 18, 22\n" - - "\tvminsh 16, 6, 14\n" - "\tvmaxsh 17, 6, 14\n" - "\tvsubuhm 18, 17, 16\n" - "\tvsum4shs 22, 18, 22\n" - - "\tvminsh 16, 7, 15\n" - "\tvmaxsh 17, 7, 15\n" - "\tvsubuhm 18, 17, 16\n" - "\tvsum4shs 22, 18, 22\n" - - "\tvsumsws 22, 22, 19\n" - - "\tli 0, 0\n" - "\tstvx 22, %0, 0\n" - : - : "r" (x) - ); - *dest = x[3]; -} -#endif - - #ifdef TEST_sad8x8_s16 int TEST_sad8x8_s16(void) {