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| author |   Terry Guo <terry.guo@arm.com> | 2014-11-20 13:54:27 +0800 |
|---|---|---|
| committer | Terry Guo <terry.guo@arm.com> | 2014-11-20 13:54:27 +0800 |
| commit | 9274e9de160a98d737bb2bd068c22d37ec66d98d (patch) | |
| tree | 0282392448b637559a928cc7569755dd0d2f7964 /ld/testsuite | |
| parent | Automatic date update in version.in (diff) | |
| download | binutils-gdb-9274e9de160a98d737bb2bd068c22d37ec66d98d.tar.gz binutils-gdb-9274e9de160a98d737bb2bd068c22d37ec66d98d.tar.bz2 binutils-gdb-9274e9de160a98d737bb2bd068c22d37ec66d98d.zip | |
Enable to link ARM object file that hasn't attribute section.
bfd/ChangeLog
2014-11-20 Terry Guo <terry.guo@arm.com>
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Skip if input bfd
hasn't attribute section.
ld/testsuite/ChangeLog:
2014-11-20 Terry Guo <terry.guo@arm.com>
* ld-arm/attr-merge-nosection-1.d: New file.
* ld-arm/attr-merge-nosection-1a.s: Likewise.
* ld-arm/attr-merge-nosection-1b.s: Likewise.
* ld-arm/arm-elf.exp: Include the new test.
Diffstat (limited to 'ld/testsuite')
| -rw-r--r-- | ld/testsuite/ChangeLog | 7 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/arm-elf.exp | 1 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/attr-merge-nosection-1.d | 18 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/attr-merge-nosection-1a.s | 10 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/attr-merge-nosection-1b.s | 10 |
5 files changed, 46 insertions, 0 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 72b4bb97038..1a96da98fc8 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2014-11-20 Terry Guo <terry.guo@arm.com> + + * ld-arm/attr-merge-nosection-1.d: New file. + * ld-arm/attr-merge-nosection-1a.s: Likewise. + * ld-arm/attr-merge-nosection-1b.s: Likewise. + * ld-arm/arm-elf.exp: Include the new test. + 2014-11-18 H.J. Lu <hongjiu.lu@intel.com> PR ld/17618 diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp index 3c8cc689fea..d00b74da89a 100644 --- a/ld/testsuite/ld-arm/arm-elf.exp +++ b/ld/testsuite/ld-arm/arm-elf.exp @@ -879,6 +879,7 @@ run_dump_test "attr-merge-vfp-7" run_dump_test "attr-merge-vfp-7r" run_dump_test "attr-merge-incompatible" run_dump_test "attr-merge-arch-2" +run_dump_test "attr-merge-nosection-1" run_dump_test "unresolved-1" if { ![istarget "arm*-*-nacl*"] } { run_dump_test "unresolved-1-dyn" diff --git a/ld/testsuite/ld-arm/attr-merge-nosection-1.d b/ld/testsuite/ld-arm/attr-merge-nosection-1.d new file mode 100644 index 00000000000..a2b8d733ee0 --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge-nosection-1.d @@ -0,0 +1,18 @@ +#source: attr-merge-nosection-1a.s RUN_OBJCOPY +#source: attr-merge-nosection-1b.s +#as: +#objcopy_objects: -R '.ARM.attributes' +#ld: +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "Cortex-M4" + Tag_CPU_arch: v7E-M + Tag_CPU_arch_profile: Microcontroller + Tag_THUMB_ISA_use: Thumb-2 + Tag_FP_arch: VFPv4-D16 + Tag_ABI_HardFP_use: SP only + diff --git a/ld/testsuite/ld-arm/attr-merge-nosection-1a.s b/ld/testsuite/ld-arm/attr-merge-nosection-1a.s new file mode 100644 index 00000000000..ab358e3c740 --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge-nosection-1a.s @@ -0,0 +1,10 @@ + .cpu cortex-m0 + .fpu softvfp + .syntax unified + .thumb + .text + .global foo + .thumb_func + .type foo, %function +foo: + bx lr diff --git a/ld/testsuite/ld-arm/attr-merge-nosection-1b.s b/ld/testsuite/ld-arm/attr-merge-nosection-1b.s new file mode 100644 index 00000000000..cd656bd5cc0 --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge-nosection-1b.s @@ -0,0 +1,10 @@ + .syntax unified + .cpu cortex-m4 + .fpu fpv4-sp-d16 + .thumb + .text + .global _start + .thumb_func + .type _start, %function +_start: + bl foo |