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Diffstat (limited to 'sim/sh64/sim-main.h')
-rw-r--r-- | sim/sh64/sim-main.h | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/sim/sh64/sim-main.h b/sim/sh64/sim-main.h new file mode 100644 index 00000000000..e7cbe99217a --- /dev/null +++ b/sim/sh64/sim-main.h @@ -0,0 +1,75 @@ +/* Main header for the Hitachi SH64 architecture. */ + +#ifndef SIM_MAIN_H +#define SIM_MAIN_H + +#define USING_SIM_BASE_H /* FIXME: quick hack */ + +struct _sim_cpu; /* FIXME: should be in sim-basics.h */ +typedef struct _sim_cpu SIM_CPU; + +/* sim-basics.h includes config.h but cgen-types.h must be included before + sim-basics.h and cgen-types.h needs config.h. */ +#include "config.h" + +#include "symcat.h" +#include "sim-basics.h" +#include "cgen-types.h" +#include "sh-desc.h" +#include "sh-opc.h" +#include "arch.h" + +/* These must be defined before sim-base.h. */ +typedef UDI sim_cia; + +#define CIA_GET(cpu) CPU_PC_GET (cpu) +#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val) | (sh64_h_ism_get (cpu))) + +#include "sim-base.h" +#include "cgen-sim.h" +#include "sh64-sim.h" + +/* The _sim_cpu struct. */ + +struct _sim_cpu { + /* sim/common cpu base. */ + sim_cpu_base base; + + /* Static parts of cgen. */ + CGEN_CPU cgen_cpu; + + /* CPU specific parts go here. + Note that in files that don't need to access these pieces WANT_CPU_FOO + won't be defined and thus these parts won't appear. This is ok in the + sense that things work. It is a source of bugs though. + One has to of course be careful to not take the size of this + struct and no structure members accessed in non-cpu specific files can + go after here. Oh for a better language. */ +#if defined (WANT_CPU_SH64) + SH64_CPU_DATA cpu_data; +#endif +}; + +/* The sim_state struct. */ + +struct sim_state { + sim_cpu *cpu; +#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu) + + CGEN_STATE cgen_state; + + sim_state_base base; +}; + +/* Misc. */ + +/* Catch address exceptions. */ +extern SIM_CORE_SIGNAL_FN sh64_core_signal; +#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ +sh64_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ + (TRANSFER), (ERROR)) + +/* Default memory size. */ +#define SH64_DEFAULT_MEM_SIZE 0x800000 /* 8M */ + +#endif /* SIM_MAIN_H */ |