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| author |   Denis Dupeyron <calchan@gentoo.org> | 2006-07-02 16:10:12 +0000 |
|---|---|---|
| committer | Denis Dupeyron <calchan@gentoo.org> | 2006-07-02 16:10:12 +0000 |
| commit | 98cf2f42acdb51489f34ecee426ad4dcb961a1df (patch) | |
| tree | fdef89c4685e82eeca24e28f462da363a19e3bd8 /sci-electronics/vstgl | |
| parent | Version bump; bug #138868 (diff) | |
| download | gentoo-2-98cf2f42acdb51489f34ecee426ad4dcb961a1df.tar.gz gentoo-2-98cf2f42acdb51489f34ecee426ad4dcb961a1df.tar.bz2 gentoo-2-98cf2f42acdb51489f34ecee426ad4dcb961a1df.zip | |
Adjusted metadata, see bug #138062.
(Portage version: 2.1.1_pre1-r5)
Diffstat (limited to 'sci-electronics/vstgl')
| -rw-r--r-- | sci-electronics/vstgl/ChangeLog | 5 | ||||
| -rw-r--r-- | sci-electronics/vstgl/metadata.xml | 10 |
2 files changed, 13 insertions, 2 deletions
diff --git a/sci-electronics/vstgl/ChangeLog b/sci-electronics/vstgl/ChangeLog index bceffe1582ed..7d4ac83e380b 100644 --- a/sci-electronics/vstgl/ChangeLog +++ b/sci-electronics/vstgl/ChangeLog @@ -1,6 +1,9 @@ # ChangeLog for sci-electronics/vstgl # Copyright 2002-2006 Gentoo Foundation; Distributed under the GPL v2 -# $Header: /var/cvsroot/gentoo-x86/sci-electronics/vstgl/ChangeLog,v 1.5 2006/04/18 02:13:28 markusle Exp $ +# $Header: /var/cvsroot/gentoo-x86/sci-electronics/vstgl/ChangeLog,v 1.6 2006/07/02 16:10:12 calchan Exp $ + + 02 Jul 2006; Denis Dupeyron <calchan@gentoo.org> metadata.xml: + Adjusted metadata, see bug #138062. 18 Apr 2006; Markus Dittrich <markusle@gentoo.org> vstgl-0.6.2.ebuild: Force compilation with QT3. This fixes bug #124843. diff --git a/sci-electronics/vstgl/metadata.xml b/sci-electronics/vstgl/metadata.xml index b229aec85b8f..3161e0d2db33 100644 --- a/sci-electronics/vstgl/metadata.xml +++ b/sci-electronics/vstgl/metadata.xml @@ -1,5 +1,13 @@ <?xml version="1.0" encoding="UTF-8"?> <!DOCTYPE pkgmetadata SYSTEM "http://www.gentoo.org/dtd/metadata.dtd"> <pkgmetadata> -<herd>sci</herd> + <herd>sci-electronics</herd> + <longdescription> + This application is intended to improve the overall design flow for people who + are often working with Signal Transition Graphs (STG). From our own experience + designing control circuits using the STG model, we recognized the need for a + tool that could streamline the path from initial idea to final circuit + specification. Usually people working in this field also depend heavily on + Petrify. + </longdescription> </pkgmetadata> |