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| author |   Michał Górny <mgorny@gentoo.org> | 2022-12-27 19:44:41 +0100 |
|---|---|---|
| committer | Michał Górny <mgorny@gentoo.org> | 2022-12-27 19:45:25 +0100 |
| commit | 9f52acdde8440a1ebc0ddd5145054d2b44afe690 (patch) | |
| tree | dd7c9e8392a92fd4781dbd035dac201990af1634 /eclass | |
| parent | profiles/desc: Add LLVM_TARGETS=Xtensa (diff) | |
| download | gentoo-9f52acdde8440a1ebc0ddd5145054d2b44afe690.tar.gz gentoo-9f52acdde8440a1ebc0ddd5145054d2b44afe690.tar.bz2 gentoo-9f52acdde8440a1ebc0ddd5145054d2b44afe690.zip | |
llvm.org.eclass: Add experimental Xtensa target to 16.x
Signed-off-by: Michał Górny <mgorny@gentoo.org>
Diffstat (limited to 'eclass')
| -rw-r--r-- | eclass/llvm.org.eclass | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/eclass/llvm.org.eclass b/eclass/llvm.org.eclass index c118298595a8..92c474433b07 100644 --- a/eclass/llvm.org.eclass +++ b/eclass/llvm.org.eclass @@ -194,7 +194,7 @@ case ${LLVM_MAJOR} in PowerPC RISCV Sparc SystemZ VE WebAssembly X86 XCore ) ;; - *) + 15) ALL_LLVM_EXPERIMENTAL_TARGETS=( ARC CSKY DirectX LoongArch M68k SPIRV ) @@ -203,6 +203,15 @@ case ${LLVM_MAJOR} in PowerPC RISCV Sparc SystemZ VE WebAssembly X86 XCore ) ;; + *) + ALL_LLVM_EXPERIMENTAL_TARGETS=( + ARC CSKY DirectX LoongArch M68k SPIRV Xtensa + ) + ALL_LLVM_PRODUCTION_TARGETS=( + AArch64 AMDGPU ARM AVR BPF Hexagon Lanai Mips MSP430 NVPTX + PowerPC RISCV Sparc SystemZ VE WebAssembly X86 XCore + ) + ;; esac ALL_LLVM_TARGET_FLAGS=( |